The present invention relates to a display device, for example, a display device such as a liquid crystal display device or an organic EL display device and a fabrication method thereof.
This type of display device includes a switching element in the inside of each pixel or in the inside of a circuit portion which is provided outside a display portion which is constituted of these pixels for driving respective pixels.
As such a switching element, there has been known a switching element which uses a thin film transistor in which a polycrystalline silicon layer constitutes a semiconductor layer. In this case, usually, the circuit part is formed on the same substrate which is used as a substrate of a display part and, at the same time, the thin film transistor which is formed in the inside of the circuit part is fabricated in parallel with the thin film transistor in the inside of the pixel.
On the other hand, as the thin film transistor which uses the polycrystalline silicon layer as the semiconductor layer, there has been known a thin film transistor which has, for example, the LDD (Lightly Doped Drain) structure or the GOLD (Gate Overlapped LDD) structure which enhances the properties of the thin film transistor.
In the explanation made hereinafter, the type and the concentration of impurities which are doped in a polycrystalline silicon layer become important. Accordingly, one type of impurities is indicated by n (p-type also being present as another type) and the degree of concentration is indicated by (−) or (+), wherein (−) implies that the concentration is relatively low and (+) implies that the concentration is relatively high. Further, (−−) indicates that the concentration is set lower than the concentration in the case of (−). Here, it should be understood that the concentrations indicated by these symbols are relative values for comparison with other concentrations. That is, the concentration indicated by (n−), for example, does not always imply that the concentration always maintain the value but implies that the concentration is higher compared with the concentration of the case of (n−−) and is lower compared with the concentration of the case of (n).
The thin film transistor having the LDD structure forms an impurity region (n−) of low concentration on a drain end portion by making use of a side wall which constitutes a side wall of a gate electrode thereof, and imparts a gradient to the impurity concentration of a drain junction thus attenuating the concentration of an electric field in the vicinity of a drain. When the thin film transistor is continuously driven, a phenomenon of deterioration such as a lowering of mobility or a so-called ON current, the increase of an OFF current and the like is observed, and this phenomenon is attributed to hot carriers which are generated due to a high electric field in the vicinity of the drain.
Further, the thin film transistor having the GOLD structure forms a region corresponding to the above-mentioned impurity region (n−) in an end portion of the gate electrode in an over lapped manner thus suppressing a so-called hot carrier suppressing effect. Although the drain dielectric strength is enhanced by adopting the LDD structure, the resistance of the impurity region (n−) is large and hence, a drain current is decreased and, at the same time, a high electric field region exists in the impurity region (n−), wherein the collisional ionization becomes maximum in the high electric field region and hence, hot electrons are injected into a gate insulation film on the impurity region (n−) whereby the impurity region (n−) is depleted thus further increasing the resistance.
Although the LDD structure exhibits the high OFF current suppressing effect, the LDD structure has a serious drawback that the hot carrier suppressing effect attributed to the attenuation of the electric field in the vicinity of the drain is small, while although the GOLD structure exhibits the large hot carrier suppressing effect compared to the LDD structure, there exists a serious drawback that the OFF current is increased.
Accordingly, in constituting the above-mentioned display device, it is preferable to use the thin film transistor having the LDD structure as the thin film transistor in each pixel, while it is preferable to use the thin film transistor having the GOLD structure as the thin film transistor in a circuit part.
In this case, it is inevitable for the display device to form the thin film transistors having the different structures from each other in the display part and the circuit part and hence, fabrication steps become cumbersome. In view of such circumstances, the thin film transistor having the new structure which possesses features of both these thin film transistors simultaneously has been proposed and such a thin film transistor is disclosed in JA-A-2002-190479 and JA-A-2001-94113.
That is, in such a thin film transistor, a gate electrode includes a first gate electrode and a second gate electrode which is overlapped to the first gate electrode and has a size thereof in the channel direction set smaller than the corresponding size of the first gate electrode, while a semiconductor layer includes a channel region which is overlapped to the second gate electrode, a first impurity region which is overlapped to the first gate electrode and is formed outside the second gate electrode, a second impurity region which is formed outside the gate electrode, and a third conductive impurity region which is formed outside the gate electrode and the second impurity region, wherein the first impurity region, the second impurity region and the third impurity region are respectively formed of the same conductive type, the impurity concentration of the first impurity region is lower than the impurity concentration of the third impurity region, and the impurity concentration of the second impurity region is lower than the impurity concentration of the first impurity region.
Such constitution is, when the respective impurity regions are formed of n type, for example, constituted of respective layers of (n−), (n−−), (n+) outwardly from directly below the first gate electrode in the inside of the semiconductor layer (see JP-A-2002-190479).
Here, although JP-A-2001-94113 discloses the thin film transistor having the constitution similar to the constitution of the above-mentioned thin film transistor, the impurity concentration of the corresponding the second impurity region is set higher than the impurity concentration of the corresponding first impurity region thus providing the constitution different from the thin film transistor which the present invention aims at.
That is, the thin film transistor shown in JP-A-2001-94113 is, when the respective impurity regions are formed of n type, for example, constituted of the respective layers of (n−), (n), (n+) outwardly directly below the first gate electrode in the inside of the semiconductor layer.